ASEL=0, DSCR=00, NCODR=0, PIDR=0, PODR=0, ISEL=0, EOFR=00, PCR=0, PDR=0
P100 Pin Function Control Register
| PODR | Port Output Data 0 (0): Low output 1 (1): High output |
| PIDR | Port Input Data 0 (0): Low input 1 (1): High input |
| PDR | Port Direction 0 (0): Input (Functions as an input pin.) 1 (1): Output (Functions as an output pin.) |
| Reserved | This bit is read as 0. The write value should be 0. |
| PCR | Pull-up Control 0 (0): Disables an input pull-up. 1 (1): Enables an input pull-up. |
| Reserved | This bit is read as 0. The write value should be 0. |
| NCODR | N-Channel Open Drain Control 0 (0): CMOS output 1 (1): NMOS open-drain output |
| Reserved | These bits are read as 000. The write value should be 000. |
| DSCR | Drive Strength Control Register 0 (00): Normal drive output 1 (01): Middle drive output 2 (10): Setting prohibited 3 (11): High-drive output |
| EOFR | Event on Falling/Event on Rising 0 (00): Don’t-care 1 (01): Detect rising edge 2 (10): Detect falling edge 3 (11): Detect both edges |
| ISEL | IRQ input enable 0 (0): Not used as IRQn input pin 1 (1): Used as IRQn input pin |
| ASEL | Analog Input enable 0 (0): Used other than as analog pin 1 (1): Used as analog pin |